Instruction Set
Last updated
Last updated
ZK WorldVM uses different spaces between instructions and memory addresses. This is because ZK WorldVM has enough space to use, and using a unified space reduces the number of columns used to store constraints, thereby reducing overhead.
Currently, in this industry, there are mainly two models for designing the L0 layer of the memory hierarchy of ZK WorldVM, one is the register model, and the other is the stack model. For the stack model, state updates are implemented according to the stack's first-in-one-out model. These constraints are relatively simple. However, the downside is that accessing state is not user friendly. It is not possible to use a single instruction to randomly access data at a specific address in the stack.
In contrast, the register model requires only one instruction to complete a random read operation, while the stack model requires multiple pop and push operations. Alternatively, for efficiency, swap-like instructions were added to the MidenVM design to optimize random access to data on the stack. For the register model, any register can be accessed randomly. However, the disadvantage is that the constraint model requires copy constraints for up and down instructions, and register selectors require more columns. The columns in the tracking table are larger than the stack model.
According to the design in the previous version of the white paper, ZK WorldVM chose the register model. ZK WorldVM includes 9 general purpose registers symbolically represented as: r. 0− r8. r8 is used as fp (frame pointer). fp is an alias for r8.
The PC (program counter) pointer of the loaded program initially points to the instruction at address 0. . When an instruction is executed, the PC changes the value of the address pointed to. If no jump or call instruction is executed, the address stored in the PC register is incremented by 1 for each executed instruction, unless the instruction uses an immediate value, in which case Down, the PC increases by 2.
The PSP (Prophet Stack Pointer) register is used to allocate the Prophet memory segment when ZK WorldVM executes Prophet code. In the initial state, set the oracle memory segment start address (264− 2 · 232) to this register.
In order to minimize some degree of constraints, ZK WorldVM uses a simplified instruction set.
. ZK WorldVM uses words (64 bits) to encode instructions. Instructions are encoded with an opcode and up to three operands, which can be registers or direct values. An instruction code consists of the following 8 fields:
Field 1: Field name: NULLbit width, not used.
Field 2: Field name: OP1 immediate flags (OP1_IMM, imm). 1-bit width is set to 0, indicating that A is a register; set to 1, indicating that A is a direct value.
Field 3: Field name: Operation 0 registers (OP0_REG, reg_src1). 9 bits wide. Indicates the source op0 register index, the index ranges from 0 to 8. Set to 1 to determine the register corresponding to the index of the operation, otherwise set to 0.
Field 4: Field name: Operation 1 registers (OP1_REG, reg_src2). 9 bits wide. Indicates the source op1 register index, the index ranges from 0 to 8. Set to 1 to determine the register corresponding to the index of the operation, otherwise set to 0. If all 9 bits are set to 0, the PSP (Prophet Stack Pointer) register is used.
Field 5: Field Name: Destination Register (DST_REG, reg_dst). 9 bits wide. Indicates the target register index, the index ranges from 0 to 8. Set to 1 to determine the register corresponding to the index of the operation, otherwise set to 0.
Field 6: Field Name: Opcode Selector (opcode_sel). 21 bits wide. Indicates the opcode type, set it to 1 to determine the execution of the opcode, otherwise set it to 0.
Field 7: Field name: padding bits (stuffing bits). 14 bits wide. All bits are filled with 0 and will be used in the future. Field 8: Field Name: Immediate Data (Instant). This field is an option, determined by field 2 if field 2 is set to
This field represents a direct value, and the width of this field is 2 Word. The instruction set of ZK WorldVM is as follows, A means intermediate or register:
According to the above definition: when there is no direct value, the width used by the instruction encoding is 2W, and the width is 4W when there is a direct value. Operand alloc principle: When the register state changes, the register is set to DST_REG operand, when the register state does not change, the register is set to OP0_REG operand and OP1_REG operand, if only one register state is not changed, use OP1_REG operation Number, the instruction encoding format is shown in the following table:
Procedures call standard stack space to implement functions. When a ret instruction is executed, fp will reduce and reclaim the stack space allocated to the function. After executing the call instruction, fp points to the stack of the called function and returns the PC address stored in: [fp-1], stored in [fp- 2] the address of the caller fp in , and the first three input parameters stored in r1− r3. Arguments are stored in descending order starting from the fourth argument. Local Variables are stored on the stack in ascending order. The return value is stored in r. 0
For example: function foo (a, b, c, d, d, e), input parameters: a=0x1, b=0x2, c=0x3, d=0x4, e=0x5.
Take sum=0;
And=a+b;
Sum=and * c;
And=and+d+e
When executing a function call, fp, PC, and memory state transitions are shown in Figure 9 (yellow indicates memory address, red indicates instruction address, and blue indicates register):
